UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 962

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Pin
functions
Function
P33/TO07/TI07/
INTP3,
P34/TO06/TI06/
INTP8
P40/TOOL0
P60/SCL0,
P61/SDA0
P75/SCK01/KR5,
P76/SI01/KR6,
P77/SO01/KR7
P20/ANI0/AMP0-
to
P27/ANI7/ANP2O When using at least one port of ports P20/ANI0/AMP0- to P27/ANI7/ANP2O as a
P30/TO00/TI03/
RTC1HZ/INTP1
P31/TO03/TI00/
RTCDIV/RTCCL/
PCLBUZ1/INTP2
P32/TO01/TI01/
INTP5/PCLBUZ0
P80/SCK00/
INTP11,
P81/RxD0/SI00/
INTP9,
P82/SO00/TxD0
Details of
Function
P20/ANI0/AMP0- to P27/ANI7/ANP2O are set in the digital input (general-purpose
port) mode after release of reset.
digital port, set AV
To use P30/TO00/TI03/RTC1HZ/INTP1 as a general-purpose port, set bit 5
(RCLOE1) of real-time counter control register 0 (RTCC0), bit 0 (TO00) of timer
output register 0 (TO0) and bit 0 (TOE00) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting.
To use P31/TO03/TI00/RTCDIV/RTCCL/PCLBUZ1/INTP2 as a general-purpose port,
set bit 4 (RCLOE0) of real-time counter control register 0 (RTCC0), bit 6 (RCLOE2)
of real-time counter control register 2 (RTCC2), bit 3 (TO03) of timer output register 0
(TO0), bit 3 (TOE03) of timer output enable register 0 (TOE0) and bit 7 of clock
output select register 1 (CKS1) to “0”, which is the same as their default status
setting.
To use P32/TO01/TI01/INTP5/PCLBUZ0 as a general-purpose port, set bit 1 (TO01)
of timer output register 0 (TO0), bit 1 (TOE01) of timer output enable register 0
(TOE0) and bit 7 of clock output select register 0 (CKS0) to “0”, which is the same as
their default status setting.
To use P33/TO07/TI07/INTP3 and P34/TO06/TI06/INTP8 as a general-purpose port,
set bit 7, 6 (TO07, TO06) of timer output register 0 (TO0), and bit 7, 6 (TOE07,
TOE06) of timer output enable register 0 (TOE0) to “0”, which is the same as their
default status setting.
The function of the P40/TOOL0 pin varies as described in (a) to (c) below.
In the case of (b) or (c), make the specified connection.
(a) In normal operation mode and when on-chip debugging is disabled (OCDENSET
(b) In normal operation mode and when on-chip debugging is enabled (OCDENSET
(c) When on-chip debug function is used, or in write mode of flash memory
When using P60/SCL0 and P61/SDA0 as a general-purpose port, stop the operation
of serial interface IICA.
To use P75/SCK01/KR5, P76/SI01/KR6, and P77/SO01/KR7, as a general-purpose
port, note the serial array unit 0 setting. For details, refer to Table 14-6 Relationship
Between Register Settings and Pins (Channel 1 of unit 0: CSI01, UART0 Reception).
To use P80/SCK00/INTP11, P81/RxD0/SI00/INTP9, and P82/SO00/TxD0, as a
general-purpose port, note the serial array unit 0 setting. For details, refer to Table
14-5 Relationship Between Register Settings and Pins (Channel 0 of unit 0: CSI00,
UART0 Reception).
= 0) by an option byte (000C3H)
= 1) by an option byte (000C3H)
programmer
=> Use this pin as a port pin (P40).
=> Connect this pin to V
=> Use this pin as TOOL0.
to the pin before reset release.
emulator or a flash memory programmer, or pull it up by connecting it to V
via an external resistor.
DD0
to the same potential as EV
DD
via an external resistor, and always input a high level
Directly connect this pin to the on-chip debug
Cautions
DD
APPENDIX C LIST OF CAUTIONS
or V
DD
.
DD
p.54
p.54
p.56
p.56
p.56
p.56
p.57
p.58
p.59
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