UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 568

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
SCLr output
SDAr output
(2) Processing flow
register mn
SDAr input
SDAr output
SCLr output
register mn
TXEmn,
RXEmn
SOEmn
SDRmn
SDAr input
INTIICr
TSFmn
SEmn
STmn
(a) When starting data reception
(b) When receiving last data
Remark
TXEmn,
RXEmn
Shift
SOEmn
SDRmn
TSFmn
INTIICr
SSmn
SEmn
STmn
Shift
D2
Output is enabled by serial
communication operation
TXEmn = 1 / RXEmn = 0
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), r: IIC number (r = 10, 20)
“H”
Dummy data (FFH)
D1
Shift operation
D0
ACK
Receive data
Figure 14-96. Timing Chart of Data Reception
D7
D7
D6
Output is stopped by serial communication operation
D6
TXEmn = 0 / RXEmn = 1
D5
Dummy data (FFH)
D5
TXEmn = 0 / RXEmn = 1
Reception of last byte
Dummy data (FFH)
D4
Shift operation
D4
D3
Shift operation
D3
D2
CHAPTER 14 SERIAL ARRAY UNIT
D1
D2
D0
D1
NACK
IIC operation stop
D0
SOmn bit
manipulation
ACK
Stop condition
Receive data
Receive data
CKOmn bit
manipulation
SOmn bit
manipulation
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