UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 463

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: F0120H, F0121H (SE0), F0160H, F0161H (SE1)
(8) Serial channel enable status register m (SEm)
Symbol
SEm
Note Bits 6 and 5 (TSFmn, BFFmn) of the SSRmn register are cleared.
SEm indicates whether data transmission/reception operation of each channel is enabled or stopped.
When 1 is written a bit of serial channel start register 0 (SSm), the corresponding bit of this register is set to 1.
When 1 is written a bit of serial channel stop register 0 (STm), the corresponding bit is cleared to 0.
Channel n that is enabled to operate cannot rewrite by software the value of CKOmn of the serial output register m
(SOm) to be described below, and a value reflected by a communication operation is output from the serial clock
pin.
Channel n that stops operation can set the value of CKOmn of the SOm register by software and output its value
from the serial clock pin. In this way, any waveform, such as that of a start condition/stop condition, can be created
by software.
SEm can be read by a 16-bit memory manipulation instruction.
The lower 8 bits of SEm can be set with an 1-bit or 8-bit memory manipulation instruction with SEmL.
Reset signal generation clears this register to 0000H.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
SEm
15
n
0
1
0
Operation stops (stops with the values of the control register and shift register, and the statuses of the serial
clock I/O pin, serial data output pin, and the FEF, PEF, and OVF error flags retained
Operation is enabled.
14
0
Figure 14-11. Format of Serial Channel Enable Status Register m (SEm)
13
0
12
0
11
0
Indication of operation enable/stop status of channel n
10
0
9
0
After reset: 0000H
8
0
7
0
R
6
0
CHAPTER 14 SERIAL ARRAY UNIT
5
0
4
0
SEm
3
3
Note
).
SEm
2
2
SEm
1
1
SEm
0
0
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