UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 455

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: F0110H, F0111H (SMR00) to F0116H, F0117H (SMR03),
SMRmn
Symbol
Remark
F0150H, F0151H (SMR10), F0152H, F0153H (SMR11),
F0154H, F0155H (SMR12), F0156H, F0157H (SMR13)
For successive transmission, the next transmit data is written by setting MDmn0 to 1 when SDRmn data has run
out.
CKS
mn0
mn2
mn0
SIS
MD
MD
mn
15
0
1
0
0
1
1
0
1
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
Falling edge is detected as the start bit.
The input communication data is captured as is.
Rising edge is detected as the start bit.
The input communication data is inverted and captured.
Transfer end interrupt
Buffer empty interrupt
CCS
mn1
MD
mn
14
0
1
0
1
CSI mode
UART mode
Simplified I
Setting prohibited
Figure 14-6. Format of Serial Mode Register mn (SMRmn) (2/2)
13
0
12
0
2
C mode
Controls inversion of level of receive data of channel n in UART mode
11
0
10
0
Selection of interrupt source of channel n
Setting of operation mode of channel n
9
0
STS
mn
8
After reset: 0020H
7
0
mn0
SIS
6
CHAPTER 14 SERIAL ARRAY UNIT
5
1
R/W
4
0
3
0
mn2
MD
2
mn1
MD
1
mn0
MD
0
455

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