UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 734

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
<R>
78K0R/Lx3
18.5.3 CSI transmission/reception
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
A flowchart showing an example of setting for CSI transmission/reception is shown below.
• Transmission/reception (256 bytes) of CSI00
• DMA channel 0 is used to read received data and DMA channel 1 is used to write transmit data.
• DMA start source: INTCSI00
• Interrupt of CSI00 is specified by IFC03 to IFC00 = IFC13 to IFC10 (bits 3 to 0 of the DMCn register) = 0110B.
• Data is transferred (received) from FFF10H of the CSI data register (SIO00) to FF100H to FF1FFH of RAM (256
• Transfers FF201H to FF2FFH (255 bytes) of RAM to FFF10H of the data register (SIO00) of CSI (transmission)
channel 1)
bytes). (In successive transmission/reception mode, the data that is to be received when the first buffer empty
interrupt occurs is invalid because the data has not been received.)
(If the same start source is specified for DMA channels 0 and 1, the data of channel 0 is transferred, and then that of
(Transmit data is written to the first byte by using software (an instruction).)
CHAPTER 18 DMA CONTROLLER
734

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