UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 106

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
3.2.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers)
FFFFFH) are allocated to this area. An instruction that accesses the extended SFR area, however, is 1 byte longer than
an instruction that accesses the SFR area.
instructions. The manipulable bit units, 1, 8, and 16, depend on the SFR type.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Unlike a general-purpose register, each extended SFR (2nd SFR) has a special function.
Extended SFRs are allocated to the F0000H to F07FFH area. SFRs other than those in the SFR area (FFF00H to
Extended SFRs can be manipulated like general-purpose registers, using operation, transfer, and bit manipulation
Each manipulation bit unit can be specified as follows.
• 1-bit manipulation
• 8-bit manipulation
• 16-bit manipulation
Table 3-6 gives a list of the extended SFRs. The meanings of items in the table are as follows.
• Symbol
• R/W
• Manipulable bit units
• After reset
Caution Do not access addresses to which 2nd SFRs are not assigned.
Remark For SFRs in the SFR area, see 3.2.4 Special function registers (SFRs).
Describe the symbol reserved by the assembler for the 1-bit manipulation instruction operand (!addr16.bit). This
manipulation can also be specified with an address.
Describe the symbol reserved by the assembler for the 8-bit manipulation instruction operand (!addr16). This
manipulation can also be specified with an address.
Describe the symbol reserved by the assembler for the 16-bit manipulation instruction operand (!addr16). When
specifying an address, describe an even address.
Symbol indicating the address of an extended SFR. It is a reserved word in the RA78K0R, and is defined as an sfr
variable using the #pragma sfr directive in the CC78K0R. When using the RA78K0R, ID78K0R-QB, and SM+ for
78K0R, symbols can be written as an instruction operand.
Indicates whether the corresponding extended SFR can be read or written.
R/W: Read/write enable
R:
W:
“√” indicates the manipulable bit unit (1, 8, or 16). “−” indicates a bit unit for which manipulation is not possible.
Indicates each register status upon reset signal generation.
Read only
Write only
CHAPTER 3 CPU ARCHITECTURE
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