UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 495

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
(2) Operation procedure
Remark
Caution After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more clocks have
Even after communication is stopped, the pin level is retained. To resume the operation, re-set the SOm
register (see Figure 14-41 Procedure for Resuming Master Transmission/Reception).
elapsed.
Figure 14-39. Initial Setting Procedure for Master Transmission/Reception
Figure 14-40. Procedure for Stopping Master Transmission/Reception
Changing setting of SOEm register
Changing setting of SOEm
Setting SMRmn register
Stopping communication
Setting SCRmn register
Setting SDRmn register
Starting communication
Writing to SSm register
Setting SPSm register
Setting PER0 register
Starting setting to stop
Starting initial setting
Setting SOm register
Setting STm register
Setting port
register
Release the serial array unit from the
reset status and start clock supply.
Set the prescaler.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate.
Manipulate the SOmn and CKOmn bits
and set an initial output level.
Set the SOEmn bit to 1 and enable
data output of the target channel.
Enable data output and clock output of
the target channel by setting a port
register and a port mode register.
Set the SSmn bit of the target channel
to 1 to set SEmn = 1.
Set transmit data to the SIOp register
(bits 7 to 0 of the SDRmn register) and
start communication.
Set the SOEm register and stop the
output of the target channel.
Stop communication in midway.
Write 1 to the STmn bit of the target
channel.
CHAPTER 14 SERIAL ARRAY UNIT
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