UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 811
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UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: FFFA9H
Symbol
Notes 1.
LVIM
2.
3.
LVION
LVION
LVISEL
LVIMD
<7>
The reset value changes depending on the reset source and the setting of the option byte.
This register is not cleared (00H) by LVI reset.
It is set to “82H” when a reset signal other than LVI is applied if option byte LVIOFF = 0, and to “00H” if
option byte LVIOFF = 1.
Bit 0 is read-only.
LVION, LVIMD, and LVISEL are cleared to 0 in the case of a reset other than an LVI reset. These are not
cleared to 0 in the case of an LVI reset.
LVIF
0
1
0
1
0
1
0
1
Notes 3, 4
Note 3
Note 3
After reset: 00H
Disables operation
Enables operation
Detects level of supply voltage (V
Detects level of input voltage from external input pin (EXLVI)
• LVISEL = 0: Generates an internal interrupt signal when the supply voltage (V
• LVISEL = 1: Generates an interrupt signal when the input voltage from an external
• LVISEL = 0: Generates an internal reset signal when the supply voltage (V
• LVISEL = 1: Generates an internal reset signal when the input voltage from an
• LVISEL = 0: Supply voltage (V
• LVISEL = 1: Input voltage from external input pin (EXLVI) ≥ detection voltage (V
• LVISEL = 0: Supply voltage (V
• LVISEL = 1: Input voltage from external input pin (EXLVI) < detection voltage (V
Figure 24-2. Format of Low-Voltage Detection Register (LVIM)
6
0
Note 1
Low-voltage detection operation mode (interrupt/reset) selection
lower than the detection voltage (V
V
input pin (EXLVI) drops lower than the detection voltage (V
V
detection voltage (V
external input pin (EXLVI) < detection voltage (V
reset signal when EXLVI ≥ V
disabled
or when LVI operation is disabled
5
0
LVI
EXLVI
R/W
or higher (V
) or when EXLVI becomes V
Note 2
Enables low-voltage detection operation
4
0
Voltage detection selection
DD
Low-voltage detection flag
DD
DD
DD
≥ V
) ≥ detection voltage (V
) < detection voltage (V
LVI
)
LVI
) and releases the reset signal when V
).
3
0
EXLVI
.
CHAPTER 24 LOW-VOLTAGE DETECTOR
EXLVI
LVI
LVISEL
) (V
<2>
or higher (EXLVI ≥ V
DD
LVI
LVI
< V
), or when LVI operation is
)
LVI
EXLVI
) or when V
LVIMD
<1>
) and releases the
EXLVI
EXLVI
DD
DD
DD
) (EXLVI <
becomes
).
≥ V
LVIF
) <
<0>
DD
LVI
) drops
EXLVI
EXLVI
.
),
)
811
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