UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 994

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Low-
voltage
detector
Regulator
Function
Cautions for low-
voltage detector
RMC: Regulator
mode control
register
Details of
Function
In a system where the supply voltage (V
vicinity of the LVI detection voltage (V
how the low-voltage detector is used.
Operation example 1: When used as reset
The system may be repeatedly reset and released from the reset status.
The time from reset release through microcontroller operation start can be set
arbitrarily by the following action.
<Action>
After releasing the reset signal, wait for the supply voltage fluctuation period of each
system by means of a software counter that uses a timer, and then initialize the ports
(see Figure 24-11).
Operation example 2: When used as interrupt
Interrupt requests may be generated frequently.
Take the following action.
<Action>
Confirm that “supply voltage (V
falling edge of V
the rising edge of V
(LVIF) of the low-voltage detection register (LVIM). Clear bit 1 (LVIIF) of interrupt
request flag register 0L (IF0L) to 0.
For a system with a long supply voltage fluctuation period near the LVI detection
voltage, take the above action after waiting for the supply voltage fluctuation time.
There is some delay from the time supply voltage (V
until the time LVI reset has been generated.
In the same way, there is also some delay from the time LVI detection voltage (V
≤ supply voltage (V
The RMC register can be rewritten only in the low-power consumption mode (refer to
Table 25-1). In other words, rewrite this register during CPU operation with the
subsystem clock (f
internal oscillation clock, and the 20 MHz internal high-speed oscillation clock (f
are both stopped.
When using the setting fixed to the low consumption current mode, the RMC register
can be used in the following cases.
<When the high-speed internal oscillation clock (f
(TYP.)) is selected as the CPU clock>
f
stop..
<When the X1 clock (f
clock>
f
<When the subsystem clock (f
Both the internal high-speed oscillator and external oscillator (f
either one stops.
In low-power consumption mode, use the regulator with f
executing self programming.
CLK
CLK
≤ 1 MHz, f
≤ 1 MHz and external oscillator (X1 clock (f
X
/f
DD
EX
, or “supply voltage (V
DD
≤ 5 MHz and the internal high-speed oscillator stop.
XT
DD
) until the time LVI reset has been released (see Figure 24-12).
) while the high-speed system clock (f
X
, in the servicing routine of the LVI interrupt by using bit 0
) or external main system clock (f
SUB
DD
) is selected as the CPU clock>
) ≥ detection voltage (V
Cautions
LVI
DD
), the operation is as follows depending on
) < detection voltage (V
DD
) fluctuates for a certain period in the
X
APPENDIX C LIST OF CAUTIONS
), external main system clock (f
IH
DD
= 8 MHz (TYP.) or f
) < LVI detection voltage (V
EX
CLK
) is selected as the CPU
LVI
)” when detecting the
X
fixed to 1 MHz when
/f
MX
EX
LVI
), the high-speed
)” when detecting
≤ 5 MHz) stop or
IH
= 1 MHz
IH20
EX
LVI
LVI
))
)
)
)
p.832
p.832
p.833
pp.828
p.831
to 831
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994

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