UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 804

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
23.2 Configuration of Power-on-Clear Circuit
23.3 Operation of Power-on-Clear Circuit
below.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The block diagram of the power-on-clear circuit is shown in Figure 23-1.
• An internal reset signal is generated on power application. When the supply voltage (V
• The supply voltage (V
The timing of generation of the internal reset signal by the power-on-clear circuit and low-voltage detector is shown
voltage (V
Caution If the low-voltage detector (LVI) is set to ON by an option byte by default, the reset signal is not
internal reset signal is generated.
Note
These are preliminary values and subject to change.
PDR
released until the supply voltage (V
= 1.61 V ±0.09 V
V
DD
DD
) and detection voltage (V
Figure 23-1. Block Diagram of Power-on-Clear Circuit
Reference
voltage
Note
source
), the reset status is released.
+
V
DD
DD
) exceeds 2.07 V ±0.2 V
PDR
= 1.59 V ±0.09 V
CHAPTER 23 POWER-ON-CLEAR CIRCUIT
Note
Note
) are compared. When V
Internal reset signal
.
DD
) exceeds the detection
DD
< V
PDR
, the
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