UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 557

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
14.7 Operation of Simplified I
(SCL) and serial data (SDA). This communication function is designed to execute single communication with devices such
as EEPROM, flash memory, and A/D converter, and therefore, can be used only by the master and does not have a wait
detection function. Make sure by using software, as well as operating the control registers, that the AC specifications of
the start and stop conditions are observed.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
[Data transmission/reception]
[Interrupt function]
[Error detection flag]
* [Functions not supported by simplified I
Note An ACK is not output when the last data is being received by writing 0 to the SOEmn (SOEm register) bit and
Remarks 1. To use the full-function I
The channels supporting simplified I
0
1
• Master transmission, master reception (only master function with a single master)
• ACK output function
• Data length of 8 bits
• Manual generation of start condition and stop condition
• Transfer end interrupt
• Parity error (ACK error)
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection function
Unit
(When an address is transmitted, the address is specified by the higher 7 bits, and the least significant bit is
used for R/W control.)
stopping the output of serial communication data. See 14.7.3 (2) Processing flow for details.
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
0
1
2
3
0
1
2
3
Channel
Note
and ACK detection function
2
C (IIC10, IIC20) Communication
2
Used as CSI
C (IIC10, IIC20) are channel 2 of SAU0 and channel 0 of SAU1.
2
C bus, see CHAPTER 15 SERIAL INTERFACE IICA.
CSI00
CSI01
CSI10
CSI20
2
−
−
−
−
C]
UART3 (supporting LIN-bus)
Used as UART
UART1
UART2
UART0
CHAPTER 14 SERIAL ARRAY UNIT
Used as Simplified I
IIC10
IIC20
−
−
−
−
−
−
2
C
557