UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 861
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UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Download datasheet (7Mb)
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
(2) Subtraction: Calculating the result of subtracting a BCD code value from another BCD code value by
<1> The BCD code value from which subtraction is performed is stored in the A register.
<2> By subtracting the value of the second operand (value of BCD code to be subtracted) from the A register as is
<3> Decimal correction is performed by subtracting the value of the BCDADJ register (correction value) from the A
An example is shown below.
Example: 91 − 52 = 39
in binary, the calculation result in binary is stored in the A register, and the correction value is stored in the
BCDADJ register.
register (subtraction result in binary) in binary, and the correction result is stored in the A register and CY
register.
Caution The value read from the BCDADJ register varies depending on the value of the A register
MOV A, #91H
SUB A, #52H
SUB A, !BCDADJ
using a BCD code value
when it is read and those of the CY and AC flags. Therefore, execute the instruction <3>
after the instruction <2> instead of executing any other instructions. To perform BCD
correction in the interrupt enabled state, saving and restoring the A register is required
within the interrupt function. PSW (CY flag and AC flag) is restored by the RETI instruction.
Instruction
; <1>
; <2>
; <3>
A Register
3FH
91H
39H
CY Register
−
0
0
CHAPTER 29 BCD CORRECTION CIRCUIT
AC Flag
1
0
−
BCDADJ
Register
06H
−
−
861
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