UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 857

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
28.2 On-Chip Debug Security ID
CHAPTER 26 OPTION BYTE) and an on-chip debug security ID setting area at 000C4H to 000CDH, to prevent third
parties from reading memory content.
advance, because 000C3H, 000C4H to 000CDH and 010C3H, and 010C4H to 010CDH are switched.
Function User’s Manual (U18371E).
28.3 Securing of User Resources
the securing of memory space must be done beforehand.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remark 2-line mode is not used for flash programming, however, even if TOOL1 pin is connected with CLK_IN of QB-
The 78K0R/Lx3 microcontrollers have an on-chip debug operation control bit in the flash memory at 000C3H (see
When the boot swap function is used, also set a value that is the same as that of 010C3H and 010C4H to 010CDH in
For details on the on-chip debug security ID, refer to the QB-MINI2 On-Chip Debug Emulator with Programming
To perform communication between the 78K0R/Lx3 microcontrollers and QB-MINI2, as well as each debug function,
If NEC Electronics assembler RA78K0R or compiler CC78K0R is used, the items can be set by using linker options.
(1) Securement of memory space
The shaded portions in Figure 28-2 are the areas reserved for placing the debug monitor program, so user
programs or data cannot be allocated in these spaces. When using the on-chip debug function, these spaces must
be secured so as not to be used by the user program. Moreover, this area must not be rewritten by the user
program.
MINI2, writing is performed normally with no problem.
1-line mode
2-line mode
Communicat
ion mode
000C4H to 000CDH
010C4H to 010CDH
Table 28-1. Lists the Differences Between 1-line Mode and 2-line Mode.
Address
Available
None
Flash memory
programming
function
Table 28-2. On-Chip Debug Security ID
Any ID code of 10 bytes
• Pseudo real-time RAM monitor (RRM) function not supported.
• DMM function (rewriting memory in RUN) not supported.
• The debugger speed is two to four times slower than 2-line mode.
• Pseudo real-time RAM monitor (RRM) function supported
• DMM function (rewriting memory in RUN) supported
On-Chip Debug Security ID
CHAPTER 28 ON-CHIP DEBUG FUNCTION
Debugging function
857

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