UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 205
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UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
4.4.4 Connecting to external device with different power potential (2.5 V, 3 V)
on a 2.5V or 3 V power supply voltage are possible.
open drain (V
(1) Setting procedure when using I/O pins of UART1, UART2 CSI00, CSI01, CSI10, and CSI20 functions
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
When parts of ports 1, 7, and 8 operate with V
Regarding inputs, CMOS/TTL switching is possible on a bit-by-bit basis by port input mode registers (PIM1 and PIM7).
Moreover, regarding outputs, different power potentials can be supported by switching the output buffer to the N-ch
(a) Use as 2.5V or 3 V input port
(b) Use as 2.5V or 3 V output port
<1> After reset release, the port mode is the input mode (Hi-Z).
<2> If pull-up is needed, externally pull up the pin to be used (on-chip pull-up resistor cannot be used).
<3> Set the corresponding bit of the PIMn register to 1 to switch to the TTL input buffer.
<4> V
<1> After reset release, the port mode changes to the input mode (Hi-Z).
<2> Pull up externally the pin to be used (on-chip pull-up resistor cannot be used).
<3> Set the output latch of the corresponding port to 1.
<4> Set the corresponding bit of the POMn register to 1 to set the N-ch open drain output (V
<5> Set the output mode by manipulating the PMn register.
<6> Operation is done only in the low level according to the operating status of the serial array unit.
DD
withstand voltage) by the port output mode registers (POM1, POM7 and POM8).
Remark n = 1, 7
Remark n = 1, 7, 8
voltage) mode.
At this time, the output data is high level, so the pin is in the Hi-Z state.
In case of UART1:
In case of UART2:
In case of CSI01:
In case of CSI10:
In case of CSI20:
In case of UART1:
In case of UART2:
In case of CSI00:
In case of CSI01:
In case of CSI10:
In case of CSI20:
IH
/V
IL
operates on a 2.5V or 3 V operating voltage.
P14
P11
P75, P76
P15, P14
P10, P11
P13
P12
P80, P82
P75, P77
P15, P13
P10, P12
DD
= 4.0 V to 5.5 V, I/O connections with an external device that operates
CHAPTER 4 PORT FUNCTIONS
DD
withstand
205
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