UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 415

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
<Change the channel>
<Complete A/D conversion>
The setting methods are described below.
<1> Set bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 1.
<2> Select the conversion time by using bits 5 to 1 (FR2 to FR0, LV1, and LV0) of A/D converter mode register
<3> Use bits 7, 3, 1, and 0 (ADREF, VRSEL, VRGV, and VRON) of the analog reference voltage control register
<4> Set bit 0 (ADCE) of ADM to 1.
<5> Set the channel to be used in the analog input mode by using bits 4 to 0 (ADPC4 to ADPC0) of the A/D port
<6> Select a channel to be used by using bits 3 to 0 (ADS3 to ADS0) of the analog input channel specification
<7> Use bits 0 and 7 (ADTRS, ADTMD) of A/D converter mode register 1 (ADM1) to set the trigger mode.
<8> In the software trigger mode
<9> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<10> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<11> In the continuous conversion mode
<12> Change the channel using bits 3 to 0 (ADS3 to ADS0) of ADS to start A/D conversion.
<13> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<14> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<15> Clear ADCS to 0.
<16> In the software trigger mode
<17> Clear bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 0.
Note When in timer trigger mode (single conversion mode), the A/D conversion operation is continued even if bits
(ADM), and select the operation mode by using bit 6 (ADSCM) of ADM.
(ADVRC) to specify the reference voltage source of the A/D converter and the operation of the input gate
voltage boost circuit for the A/D converter.
configuration register (ADPC), bits 7 to 0 (PM27 to PM20) of port mode register 2 (PM2), and bits 7, 2 to 0
(PM157, PM152 to PM150) of port mode register 15 (PM15).
register (ADS).
→ Start A/D conversion by setting bit 7 (ADCS) of ADM to 1.
In the timer trigger mode
→ ADCS is automatically set to 1 and A/D conversion starts when the timer trigger signal is generated.
→ Start the next A/D conversion automatically.
In the single conversion mode
→ ADCS is automatically cleared to 0 and the A/D converter goes on standby. To start A/D conversion
→ Clear ADCE to 0.
In the timer trigger mode
→ Clear ADCE and ADTMD to 0.
3 to 0 of ADS are set during A/D conversion. The channel will be changed when the next A/D conversion
operation starts.
When in any other mode, A/D conversion operation is aborted after bits 3 to 0 of ADS have been set, and
A/D conversion operation is started from the beginning after the channel has been changed.
operation, go to step <8>.
CHAPTER 10 A/D CONVERTER
Note
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