UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 577

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Note1
SE
01
0
1
78K0R/Lx3
Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remarks 1. X: Don’t care
012
MD
0
0
0
0
Table 14-6. Relationship between register settings and pins (Channel 1 of unit 0: CSI01, UART0 reception)
2. When channel 1 of unit 0 is set to UART0 reception, this pin becomes an RxD0 function pin. In this case, set
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 14.3 (12) Serial output register
5. When using UART0 transmission and reception in a pair, set channel 0 of unit 0 to UART0 transmission (refer to
6. The SMR00 register of channel 0 of unit 0 must also be set during UART0 reception. For details, refer to 14.5.2
011
MD
0
1
0
1
channel 0 of unit 0 to operation stop mode or UART0 transmission (refer to Table 14-5).
When channel 0 of unit 0 is set to CSI00, this pin cannot be used as an RxD0 function pin. In this case, set
channel 1 of unit 0 to operation stop mode or CSI01.
m (SOm).
Table 14-5).
(1) Register setting.
2. For 78K0R/LF3, the channel 1 of unit 0 is not mounted.
3. For 78K0R/LG3, CSI01 is not mounted.
SOE
01
0
0
1
1
0
1
1
0
SO01 CKO
Note4
Note4
Note4
Note4
0/1
0/1
0/1
0/1
1
1
1
1
Note4
Note4
Note4
0/1
0/1
0/1
01
1
1
1
1
1
TXE
01
0
0
1
1
0
1
1
0
RXE
01
0
1
0
1
1
0
1
1
Note3
Note3
PM
75
×
1
1
1
0
0
0
×
Note3
Note3
P75
1
1
1
×
×
×
×
×
Note3
Note3
Note3
Note3
PM
76
×
1
×
1
1
×
1
×
Note3
Note3
Note3
Note3
P76 PM
×
×
×
×
×
×
×
×
Note3
Note3
Note3
Note3
77
×
×
0
0
×
0
0
×
Note3
Note3
Note3
Note3
P77 PM
×
×
1
1
×
1
1
×
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note2
81
×
×
×
×
×
×
×
1
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note2
P81
×
×
×
×
×
×
×
×
CHAPTER 14 SERIAL ARRAY UNIT
transmission
transmission
transmission
transmission
Operation
Operation
/reception
/reception
reception
reception
reception
UART0
Master
Master
Master
CSI01
CSI01
CSI01
CSI01
CSI01
CSI01
Note5, 6
mode
mode
Slave
Slave
Slave
stop
(output)
(output)
(output)
SCK01/
SCK01
SCK01
SCK01
SCK01
SCK01
SCK01
(input)
(input)
(input)
KR5/
KR5/
KR5/
P75
P75
P75
KR6/P76 KR7/
KR6/P76 SO01
KR6/P76 SO01
KR6/P76 KR7/
SI01/
KR6/
SI01
SI01
SI01
SI01
P76
Pin Function
SO01/
SO01
SO01
KR7/
KR7/
KR7/
P77
P77
P77
P77
P77
RxD0/SI00/
INTP9/P80
INTP9/P80
INTP9/P80
INTP9/P80
INTP9/P80
INTP9/P80
INTP9/P80
P81
INTP9/
RxD0
SI00/
SI00/
SI00/
SI00/
SI00/
SI00/
SI00/
Note2
577

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