UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 983

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
3-wire
I/O (CSI00,
CSI01, CSI10,
CSI20)
communication
UART (UART0,
UART1,
UART2,
UART3)
communication
Simplified
I
IIC20)
communi-
cation
2
Function
C (IIC10,
serial
Slave
transmission
Slave transmission
(in continuous
transmission mode)
Slave reception
Slave
transmission/
reception
Slave
transmission/
reception (in
continuous
transmission/
reception mode)
UART
communication
UART
transmission
UART
transmission (in
continuous
transmission
mode)
UART reception
Calculating baud
rate
Address field
transmission
Data reception
Calculating baud
rate
Details of
Function
The MDmn0 bit can be rewritten even during operation.
The MDmn0 bit can be rewritten even during operation.
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
The MDmn0 bit can be rewritten even during operation. However, rewrite it before
transfer of the last bit is started.
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
However, rewrite it before transfer of the last bit is started, so that it will be rewritten
before the transfer end interrupt of the last transmit data.
When using serial array units 0 and 1 as UARTs, the channels of both the
transmitting side (even-number channel) and the receiving side (odd-number
channel) can be used only as UARTs.
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
However, rewrite it before transfer of the last bit is started, so that it has been
rewritten before the transfer end interrupt of the last transmit data.
For the UART reception, be sure to set SMRmr of channel r that is to be paired with
channel n.
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
Setting SDRmn [15:9] = (0000000B, 0000001B) is prohibited.
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more
clocks have elapsed.
ACK is also output when the last data is received. Communication is then completed
by setting “1” to the STmn bit to stop operation and generating a stop condition.
Setting SDRmn [15:9] = 0000000B is prohibited. Set SDRmn[15:9] to 0000001B or
greater.
Cautions
APPENDIX C LIST OF CAUTIONS
507, 509
522, 524
535, 537
pp.503,
p.508
pp.512,
515
pp.518,
p.523
p.527
pp.531,
p.536
pp.539,
540
pp.541,
544
p.553
p.560
p.569
p.571
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