UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 757

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
(2) Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Figure 19-5. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H) (78K0R/LF3)
Caution Be sure to set bits 5, 6 of MK0H, bit 3 of MK1L, bit 3 of MK1H, bits 5 to 7 of MK2L, bits 0, 6, 7 of MK2H
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
MK0L, MK0H, MK1L, MK1H, MK2L, and MK2H can be set by a 1-bit or 8-bit memory manipulation instruction. When
MK0L and MK0H, MK1L and MK1H, and MK2L and MK2H are combined to form 16-bit registers MK0, MK1, and MK2,
they can be set by a 16-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark If an instruction that writes data to this register is executed, the number of instruction execution clocks
Address: FFFE4H
Address: FFFE5H
Address: FFFE6H
Address: FFFE7H
Address: FFFD4H
Address: FFFD5H
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
MK0H
MK1H
MK2H
MK0L
MK1L
MK2L
to 1.
increases by 2 clocks.
SREMK0
TMMK03
TMMK04
XXMKX
PMK5
<7>
<7>
<7>
<7>
7
1
7
1
0
1
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
Interrupt servicing enabled
Interrupt servicing disabled
TMMK02
SREMK2
PMK4
<6>
<6>
<6>
6
1
6
1
6
1
R/W
R/W
R/W
R/W
R/W
R/W
TMMK01
SRMK2
MDMK
PMK3
<5>
<5>
<5>
<5>
5
1
5
1
DMAMK1
CSIMK20
TMMK00
TMMK13
IICMK20
STMK2
PMK2
PMK7
<4>
<4>
<4>
<4>
<4>
<4>
Interrupt servicing control
DMAMK0
TMMK12
PMK1
PMK6
<3>
<3>
<3>
<3>
3
1
3
1
CHAPTER 19 INTERRUPT FUNCTIONS
SREMK3
SREMK1
TMMK07
TMMK11
RTCIMK
PMK0
<2>
<2>
<2>
<2>
<2>
<2>
TMMK06
TMMK10
SRMK3
SRMK1
RTCMK
LVIMK
<1>
<1>
<1>
<1>
<1>
<1>
CSIMK10
WDTIMK
TMMK05
IICMK10
STMK3
STMK1
ADMK
<0>
<0>
<0>
<0>
<0>
0
1
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