UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 321

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Remark
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
TAU stop
pq: Unit number + Channel number (only for channels provided with timer I/O pins)
pq = 00, 02 to 04
To hold the TOpq pin output level
When holding the TOpq pin output level is not
necessary
The TAU0EN or TAU1EN bits of the PER0 register is
cleared to 0.
Clears TOpq bit to 0 after the value to
be held is set to the port register.
Switches the port mode register to input mode.
Figure 6-48. Operation Procedure When Frequency Divider Function Is Used (2/2)
Software Operation
The TOpq pin output level is held by port function.
The TOpq pin output level goes into Hi-Z output state.
Power-off status
All circuits are initialized and SFR of each channel is also
initialized.
(The TOpq bit is cleared to 0 and the TOpq pin is set to
port mode).
CHAPTER 6 TIMER ARRAY UNIT
Hardware Status
321

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