UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 9

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 5 CLOCK GENERATOR .................................................................................................... 213
CHAPTER 6 TIMER ARRAY UNIT...................................................................................................... 258
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
4.3 Registers Controlling Port Function ........................................................................................ 187
4.4 Port Function Operations .......................................................................................................... 204
4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function........... 207
4.6 Cautions on 1-bit Manipulation Instruction for Port Register n (Pn) .................................... 212
5.1 Functions of Clock Generator................................................................................................... 213
5.2 Configuration of Clock Generator ............................................................................................ 214
5.3 Registers Controlling Clock Generator.................................................................................... 216
5.4 System Clock Oscillator ............................................................................................................ 229
5.5 Clock Generator Operation ....................................................................................................... 234
5.6 Controlling Clock........................................................................................................................ 239
6.1 Functions of Timer Array Unit................................................................................................... 260
6.2 Configuration of Timer Array Unit ............................................................................................ 262
6.3 Registers Controlling Timer Array Unit.................................................................................... 268
6.4 Channel Output (TOpq pin) Control ......................................................................................... 296
6.5 Channel Input Control................................................................................................................ 303
6.6 Basic Function of Timer Array Unit .......................................................................................... 304
4.2.15 Port 14......................................................................................................................................... 180
4.2.16 Port 15......................................................................................................................................... 183
4.4.1 Writing to I/O port .......................................................................................................................... 204
4.4.2 Reading from I/O port.................................................................................................................... 204
4.4.3 Operations on I/O port................................................................................................................... 204
4.4.4 Connecting to external device with different power potential (2.5 V, 3 V)...................................... 205
5.4.1 X1 oscillator................................................................................................................................... 229
5.4.2 XT1 oscillator ................................................................................................................................ 229
5.4.3 Internal high-speed oscillator ........................................................................................................ 233
5.4.4 Internal low-speed oscillator.......................................................................................................... 233
5.4.5 Prescaler ....................................................................................................................................... 233
5.6.1 Example of controlling high-speed system clock ........................................................................... 239
5.6.2 Example of controlling internal high-speed oscillation clock.......................................................... 242
5.6.3 Example of controlling subsystem clock........................................................................................ 244
5.6.4 Example of controlling internal low-speed oscillation clock ........................................................... 246
5.6.5 CPU clock status transition diagram.............................................................................................. 247
5.6.6 Condition before changing CPU clock and processing after changing CPU clock ........................ 254
5.6.7 Time required for switchover of CPU clock and main system clock .............................................. 256
5.6.8 Conditions before clock oscillation is stopped ............................................................................... 257
6.1.1 Functions of each channel when it operates independently .......................................................... 260
6.1.2 Functions of each channel when it operates with another channel ............................................... 261
6.1.3 LIN-bus supporting function (channel 7 of timer array unit 0 only) ................................................ 261
6.4.1 TOpq pin output circuit configuration............................................................................................. 296
6.4.2 TOpq Pin Output Setting ............................................................................................................... 297
6.4.3 Cautions on Channel Output Operation ........................................................................................ 298
6.4.4 Collective manipulation of TOpq bits ............................................................................................. 301
6.4.5 Timer Interrupt and TOpq Pin Output at Operation Start............................................................... 302
6.5.1 Edge detection circuit .................................................................................................................... 303
6.6.1 Overview of single-operation function and combination operation function................................... 304
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