UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 473

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
• 78K0R/LF3
• 78K0R/LG3
• 78K0R/LH3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Symbol
Symbol
Symbol
PM1
PM5
PM1
PM5
PM8
PM1
PM5
PM7
PM8
(18) Port mode registers 1, 5, 7, 8 (PM1, PM5, PM7, PM8)
These registers set input/output of ports 1, 5, 7 and 8 in 1-bit units.
When using the P10/SCK20/SCL20, P11/SI20/SDA20/RxD2/INTP6, P12/SO20/TxD2/TO02, P13/SO10/TxD1/TO04,
P14/SI10/SDA10/RxD1/INTP4, P15/SCK10/SCL10/INTP7, P51/TxD3/SEGx (78K0R/LF3: x = 29, 78K0R/LG3: x = 38,
78K0R/LH3: x = 52), P75/SCK01/KR5, P77/SO01/KR7, P80/SCK00/INTP11, and P82/SO00/TxD0 pins for serial data
output or serial clock output, clear the PM10, PM11, PM12, PM13, PM14, PM15, PM51, PM75, PM77, PM80, and
PM82 bits to 0, and set the output latches of P10, P11, P12, P13, P14, P15, P51, P75, P77, P80, and P82 to 1.
When using the P10/SCK20/SCL20, P11/SI20/SDA20/RxD2/INTP6, P14/SI10/SDA10/RxD1/INTP4,
P15/SCK10/SCL10/INTP7, P50/RxD3/SEGx (78K0R/LF3: x = 30, 78K0R/LG3: x = 39, 78K0R/LH3: x = 53),
P75/SCK01/KR5, P76/SI01/KR6, P80/SCK00/INTP11, and P81/SI00/RxD0/INTP9 pins for serial data input or serial
clock input, set the PM10, PM11, PM14, PM15, PM50, PM75, PM76, PM80, and PM81 bits to 1. At this time, the
output latches of P10, P11, P14, P15, P50, P75, P76, P80, and P81 may be 0 or 1.
PM1, PM5, PM7, and PM8 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
PMmn
PM57
PM57
PM17
PM57
PM77
PM87
7
1
7
1
1
7
0
1
Figure 14-21. Format of Port Mode Registers 1, 5, 7, and 8 (PM1, PM5, PM7, PM8)
Output mode (output buffer on)
Input mode (output buffer off)
PM56
PM16
PM56
PM16
PM56
PM76
PM86
6
1
6
1
6
PM15
PM55
PM15
PM55
PM15
PM55
PM75
PM85
5
5
1
5
PM14
PM54
PM14
PM54
PM14
PM54
PM74
PM84
4
4
4
1
PM13
PM53
PM13
PM53
PM13
PM53
PM73
PM83
3
3
1
3
Pmn pin I/O mode selection
(m = 1, 5, 7, 8; n = 0 to 7)
PM12
PM52
PM12
PM52
PM82
PM12
PM52
PM72
PM82
2
2
2
PM11
PM51
PM11
PM51
PM81
PM11
PM51
PM71
PM81
1
1
1
PM10
PM50
PM10
PM50
PM80
PM10
PM50
PM70
PM80
0
0
0
CHAPTER 14 SERIAL ARRAY UNIT
Address
FFF21H
FFF25H
Address
FFF21H
FFF25H
FFF28H
Address
FFF21H
FFF25H
FFF27H
FFF28H
After reset
After reset
After reset
FFH
FFH
FFH
FFH
FFH
FFH
FFH
FFH
FFH
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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