UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 961

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
This appendix lists the cautions described in this document.
“Classification (hard/soft)” in the table is as follows.
Hard: Cautions for microcontroller internal/external hardware
Soft: Cautions for software such as register settings or programs
Outline
Pin
functions
Function
On-chip debug
function
AV
REGC
P00/CAPH,
P01/CAPL,
P02/V
P10/SCK20/
SCL20,
P11/SI20/RxD2/
SDA20/INTP6
P12/TO02/SO20
/TxD2
P13/TO04/SO10
/TxD1
P14/SI10/RxD1/
SDA10/INTP4,
P15/SCK10/
SCL10/INTP7
P16/TO05/TI05/
INTP10
SS
Details of
Function
, V
LC3
SS
The 78K0R/Lx3 microcontrollers have an on-chip debug function, which is provided
for development and evaluation. Do not use the on-chip debug function in products
designated for mass production, because the guaranteed number of rewritable times
of the flash memory may be exceeded when this function is used, and product
reliability therefore cannot be guaranteed. NEC Electronics is not liable for problems
occurring when the on-chip debug function is used.
Make AV
Connect the REGC pin to V
To use P00/CAPH, P01/CAPL, and P02/V
(MDSET1) and bit 4 (MDSET0) of LCD mode register (LCDMD) to “0”, which is the
same as their default status setting.
To use P10/SCK20/SCL20 and P11/SI20/RxD2/SDA20/INTP6 as a general-purpose
port, note the serial array unit 1 setting. For details, refer to Table 14-9 Relationship
Between Register Settings and Pins (Channel 0 of unit 1: CSI20, UART2 Reception,
IIC20).
To use P12/TO02/SO20/TxD2 as a general-purpose port, set bit 2 (TO02) of timer
output register 0 (TO0) and bit 2 (TOE02) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting. And as a general-purpose port,
note the serial array unit 1 setting. For details of serial array unit 1 setting, refer to
Table 14-9 Relationship Between Register Settings and Pins (Channel 0 of unit 1:
CSI20, UART2 Reception, IIC20).
To use P13/TO04/SO10/TxD1 as a general-purpose port, set bit 4 (TO04) of timer
output register 0 (TO0) and bit 4 (TOE04) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting. And as a general-purpose port,
note the serial array unit 0 setting. For details of serial array unit 0 setting, refer to
Table 14-7 Relationship Between Register Settings and Pins (Channel 2 of unit 0:
CSI10, UART1 Transmission, IIC10).
To use P14/SI10/RxD1/SDA10/INTP4 and P15/SCK10/SCL10/INTP7 as a general-
purpose port, note the serial array unit 0 setting. For details, refer to Table 14-7
Relationship Between Register Settings and Pins (Channel 2 of unit 0: CSI10,
UART1 Transmission, IIC10).
To use P16/TO05/TI05/INTP10 as a general-purpose port, set bit 5 (TO05) of timer
output register 0 (TO0) and bit 5 (TOE05) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting.
APPENDIX C LIST OF CAUTIONS
SS
the same potential as V
SS
via a capacitor (0.47 to 1
SS
.
Cautions
LC3
as a general-purpose port, set bit 5
APPENDIX C LIST OF CAUTIONS
μ
F).
22, 24
22, 24
p.19
pp.20,
pp.20,
p.51
p.53
p.53
p.53
p.53
p.53
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