UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 90

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
• Processor mode control register (PMC)
3.1.3 Internal data memory space
general-purpose register banks consisting of eight 8-bit registers per bank are assigned to the 32-byte area of FFEE0H to
FFEFFH of the internal RAM area. However, instructions cannot be executed by using general-purpose registers.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
PMC register is described below.
This register selects the flash memory space for mirroring to area from F0000H to FFFFFH.
PMC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Cautions 1. Set PMC only once during the initial settings prior to operating the DMA controller. Rewriting
78K0R/Lx3 microcontrollers products incorporate the following RAMs.
The internal RAM can be used as a data area and a program area where instructions are written and executed. Four
The internal RAM is used as a stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
Address: FFFFEH After reset: 00H R/W
2. After setting PMC, wait for at least one instruction and access the mirror area.
3. When the
2. While using the self-programming function, the area of FFE20H to FFEFFH cannot be used as a
Symbol
PMC
PMC other than during the initial settings is prohibited.
to set bit 0 (MAA) of this register to 0.
instructions or as a stack area.
stack memory.
Figure 3-4. Format of Configuration of Processor Mode Control Register (PMC)
μ
μ
μ
PD78F1500A, 78F1503A, 78F1506A
PD78F1501A, 78F1504A, 78F1507A
PD78F1502A, 78F1505A, 78F1508A
MAA
7
0
0
1
μ
PD78F1500A, 78F1503A, and 78F1506A (flash memory size: 64 KB) are used, be sure
00000H to 0FFFFH is mirrored to F0000H to FFFFFH
10000H to 1FFFFH is mirrored to F0000H to FFFFFH
Part Number
Selection of flash memory space for mirroring to area from F0000H to FFFFFH
6
0
Table 3-4. Internal RAM Capacity
5
0
0
4
4096 × 8 bits (FEF00H to FFEFFH)
6144 × 8 bits (FE700H to FFEFFH)
7168 × 8 bits (FE300H to FFEFFH)
3
0
Internal RAM
CHAPTER 3 CPU ARCHITECTURE
2
0
1
0
MAA
<0>
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