UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 365

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: FFF99H
SUBCUD
(13) Watch error correction register (SUBCUD)
Symbol
Remark If a correctable range is −63.1 ppm or lower and 63.1 ppm or higher, set 0 to DEV.
This register is used to correct the watch with high accuracy when it is slow or fast by changing the value
(reference value: 7FFFH) that overflows from the sub-count register (RSUBC) to the second count register.
Rewrite the SUBCUD register after disabling interrupt servicing INTRTC by using the interrupt mask flag register.
Furthermore, after rewriting the SUBCUD register, enable interrupt servicing after clearing the interrupt request
flag (RTCIF) and constant-period interrupt status flag (RIFG).
SUBCUD can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
The range of value that can be corrected by using the watch error correction register (SUBCUD) is shown below.
/F5 to /F0 are the inverted values of the corresponding bits (000011 when 111100).
Range of correction value: (when F6 = 0) 2, 4, 6, 8, … , 120, 122, 124
When (F6, F5, F4, F3, F2, F1, F0) = (*, 0, 0, 0, 0, 0, *), the watch error is not corrected. * is 0 or 1.
Writing to the SUBCUD register at the following timing is prohibited.
• When DEV = 0 is set: For a period of SEC = 00H, 20H, 40H
• When DEV = 1 is set: For a period of SEC = 00H
Correctable range
Maximum excludes
quantization error
Minimum resolution
DEV
DEV
F6
0
1
0
1
7
After reset: 00H
Figure 7-14. Format of Watch Error Correction Register (SUBCUD)
Corrects watch error when the second digits are at 00, 20, or 40 (every 20 seconds).
Corrects watch error only when the second digits are at 00 (every 60 seconds).
Increases by {(F5, F4, F3, F2, F1, F0) – 1} × 2.
Decreases by {(/F5, /F4, /F3, /F2, /F1, /F0) + 1} × 2.
F6
6
R/W
(when F6 = 1) −2, −4, −6, −8, … , −120, −122, −124
−189.2 ppm to 189.2 ppm
±1.53 ppm
±3.05 ppm
DEV = 0 (correction every 20 seconds)
F5
5
Setting of watch error correction timing
Setting of watch error correction value
F4
4
F3
3
CHAPTER 7 REAL-TIME COUNTER
−63.1 ppm to 63.1 ppm
±0.51 ppm
±1.02 ppm
DEV = 1 (correction every 60 seconds)
F2
2
F1
1
F0
0
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