UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 108

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address
F010AH
F010BH
F010CH
F010DH
F010EH
F010FH
F0110H
F0111H
F0112H
F0113H
F0114H
F0115H
F0116H
F0117H
F0118H
F0119H
F011AH
F011BH
F011CH
F011DH
F011EH
F011FH
F0120H
F0121H
F0122H
F0123H
F0124H
F0125H
F0126H
F0127H
F0128H
F0129H
F012AH
F012BH
F0134H
F0135H
F0140H
F0141H
F0142H
F0143H
Serial flag clear trigger register 01
Serial flag clear trigger register 02
Serial flag clear trigger register 03
Serial mode register 00
Serial mode register 01
Serial mode register 02
Serial mode register 03
Serial communication operation setting
register 00
Serial communication operation setting
register 01
Serial communication operation setting
register 02
Serial communication operation setting
register 03
Serial channel enable status register 0
Serial channel start register 0
Serial channel stop register 0
Serial clock select register 0
Serial output register 0
Serial output enable register 0
Serial output level register 0
Serial status register 10
Serial status register 11
Special Function Register (SFR) Name
Table 3-6. Extended SFR (2nd SFR) List (2/8)
SIR01L
SIR02L
SIR03L
SMR00
SMR01
SMR02
SMR03
SCR00
SCR01
SCR02
SCR03
SE0L
SS0L
ST0L
SPS0L
SO0
SOE0L
SOL0L
SSR10L
SSR11L
−
−
−
−
−
−
−
−
−
−
−
Symbol
SIR01
SIR02
SIR03
SE0
SS0
ST0
SPS0
SOE0
SOL0
SSR10
SSR11
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Manipulable Bit Range
1-bit
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
−
√
−
√
−
−
−
−
√
−
−
−
−
−
−
−
CHAPTER 3 CPU ARCHITECTURE
8-bit
√
−
√
−
√
−
−
−
−
−
−
−
−
−
√
−
√
−
√
−
√
−
−
√
−
√
−
√
−
√
−
16-bit
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
0F0FH
0000H
0000H
0000H
0020H
0020H
0020H
0020H
0087H
0087H
0087H
0087H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
Reset
After
−
−
√
√
√
√
−
−
√
√
−
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
108