UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 546

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Notes 1. The baud rate is set so as to satisfy the standard of the wakeup signal and data of 00H is transmitted.
Remark
LIN Bus
(output)
INTST3
T
X
2. A sync break field is defined to have a width of 13 bits and output a low level. Where the baud rate for main
3. INTST3 is output upon completion of transmission. INTST3 is also output when SBF transmission is
D3
transfer is N [bps], therefore, the baud rate of the sync break field is calculated as follows.
By transmitting data of 00H at this baud rate, a sync break field is generated.
executed.
The interval between fields is controlled by software.
Note 3
(Baud rate of sync break field) = 9/13 × N
Wakeup signal
8 bits
frame
Note 1
Figure 14-82. Transmission Operation of LIN
transmission
Sync break
13-bit SBF
field
Note 2
transmission
Sync field
55H
Identification
transmission
Data
field
CHAPTER 14 SERIAL ARRAY UNIT
transmission
Data field
Data
transmission
Data field
Data
transmission
Checksum
Data
field
546

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