UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 1011

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
3rd Edition
Edition
Modification of Figure 14-53 Flowchart of Slave Transmission (in Continuous
Transmission Mode)
Modification of 14.5.5 Slave reception and Note 1
Modification of Figure 14-57 Procedure for Resuming Slave Reception
Modification of Figure 14-58 Timing Chart of Slave Reception (in Single-
Reception Mode)
Modification of 14.5.6 Slave transmission/reception and Note 1
Modification of Figure 14-62 Procedure for Stopping Slave
Transmission/Reception
Modification of Figure 14-63 Procedure for Resuming Slave
Transmission/Reception
Modification of Figure 14-64 Timing Chart of Slave Transmission/Reception (in
Single-Transmission/Reception Mode)
Modification of Figure 14-66 Timing Chart of Slave Transmission/Reception (in
Continuous Transmission/Reception Mode)
Modification of Figure 14-67 Flowchart of Slave Transmission/Reception (in
Continuous Transmission/Reception Mode)
Modification of Note 2 in Table 14-2 Selection of operation clock
Addition of Caution to 14.6 Operation of UART (UART0, UART1, UART2, UART3)
Communication
Modification of Figure 14-70 Procedure for Stopping UART Transmission
Modification of Figure 14-72 Timing Chart of UART Transmission (in Single-
Transmission Mode)
Modification of Figure 14-74 Timing Chart of UART Transmission (in
Continuous Transmission Mode)
Modification and addition of description in 14.6.2 UART reception
Addition of description of Figure 14-76 Example of Contents of Registers for
UART Reception of UART (UART0, UART1, UART2, UART3)
Modification of Figure 14-80 Timing Chart of UART Reception
Modification of the transfer data length in 14.6.3 LIN transmission
Modification of Note 2 in Figure 14-82 Transmission Operation of LIN
Modification of the transfer data length in 14.6.4 LIN reception
Modification of Note 2 in Table 14-3 Selection of operation clock
Addition of Note to 14.7 Operation of Simplified I
Communication
Addition of Note, Remark and the description of the transfer rate to 14.7.1 Address
field transmission
Modification of Figure 14-89 Initial Setting Procedure for Address Field
Transmission
Modification of Figure 14-90 Timing Chart of Address Field Transmission
Addition of Note, Remark and the description of the transfer rate to 14.7.2 Data
transmission
Modification of Figure 14-93 Timing Chart of Data Transmission
Addition of Note, Remark and the description of the transfer rate to 14.7.3 Data
reception
Modification of Figure 14-96 Timing Chart of Data Reception
Modification of Figure 14-97 Flowchart of Data Reception
Description
2
C (IIC10, IIC20)
APPENDIX D REVISION HISTORY
CHAPTER 14 SERIAL
ARRAY UNIT
(continuation)
Chapter
(9/11)
1011