UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 436
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remark 78K0R/LF3:
Caution When an operational amplifier is used, AMPn+, AMPn−, and AMPnO pins are used, so the alternative
Remark 78K0R/LF3:
The ANI0/AMP0-/P20 to ANI7/AMP2O/P27, ANI8/AMP2+/P150 to ANI10/P152 and ANI15/AV
shown below depending on the settings of ADPC, ADS, PM2, PM15, OAENn bit and ADREF bit.
Table 12-2. Setting Functions of ANI0/AMP0-/P20, ANI2/AMP0+/P22, ANI3/AMP1-/P23, ANI5/AMP1+/P25,
Digital I/O
selection
Analog input
selection
Digital I/O
selection
Analog input
selection
Table 12-3. Setting Functions of ANI1/AMP0O/P21, ANI4/AMP1O/P24, and ANI7/AMP2O/P27 Pins
register
register
ADPC
ADPC
78K0R/LG3, 78K0R/LH3:
analog input functions cannot be used.
78K0R/LG3, 78K0R/LH3:
Input mode
Output mode
Input mode
Output mode
Input mode
Output mode
Input mode
Output mode
PM2 and PM15
PM2 register
registers
ANI6/AMP2-/P26, and ANI8/AMP2+/P150 Pins
0
1
0
1
0
1
0
1
0
1
0
1
OAENn bit
ANI0/AMP0-/P20, ANI2/AMP0+/P22, ANI3/AMP1-/P23,
ANI5/AMP1+/P25, n = 0, 1
ANI0/AMP0-/P20, ANI2/AMP0+/P22, ANI3/AMP1-/P23,
ANI5/AMP1+/P25, ANI6/AMP2-/P26, ANI8/AMP2+/P150, n = 0 to 2
OAENn bit
ANI1/AMP0O/P21, ANI4/AMP1O/P24, n = 0, 1
ANI1/AMP0O/P21, ANI4/AMP1O/P24, and ANI7/AMP2O/P27, n = 0 to 2
−
−
Selects ANI.
Does not select ANI.
Selects ANI.
Does not select ANI.
Selects ANI.
Does not select ANI.
Selects ANI.
Does not select ANI.
ADS register
ADS register
−
−
−
−
−
−
−
−
−
−
CHAPTER 12 OPERATIONAL AMPLIFIER
Digital input
Setting prohibited
Digital output
Setting prohibited
Analog input (to be converted)
Analog input (not to be converted)
Setting prohibited
Operational amplifier input
Setting prohibited
Digital input
Setting prohibited
Digital output
Setting prohibited
Analog input (to be converted)
Analog input (not to be converted)
Operational amplifier output (not to
be converted)
Operational amplifier output (to be
converted)
Setting prohibited
ANI2/AMP0+/P22, ANI3/AMP1-
/P23, ANI5/AMP1+/P25,
ANI8/AMP2+/P150 Pins
ANI4/AMP1O/P24, and
ANI7/AMP2O/P27 Pins
ANI6/AMP2-/P26, and
ANI1/AMP0O/P21,
ANI0/AMP0-/P20,
REFM
/P157 pins are as
436
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