UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 480

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
(2) Operation procedure
Caution
After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more clocks have
elapsed.
Changing setting of SOEm register
Setting SMRmn register
Setting SCRmn register
Setting SDRmn register
Starting communication
Writing to SSm register
Setting SPSm register
Setting PER0 register
Setting SOm register
Starting initial setting
Figure 14-25. Initial Setting Procedure for Master Transmission
Setting port
Enable data output and clock output of
the target channel by setting a port
register and a port mode register.
Release the serial array unit from the
reset status and start clock supply.
Set the prescaler.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate.
Manipulate the SOmn and CKOmn bits
and set an initial output level.
Set the SOEmn bit to 1 and enable data
output of the target channel.
Set the SSmn bit of the target channel to
1 to set SEmn = 1.
Set transmit data to the SIOp register (bits
7 to 0 of the SDRmn register) and start
communication.
CHAPTER 14 SERIAL ARRAY UNIT
480

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