FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 116

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
Functional Description
5.7.4.2
5.7.4.3
5.7.4.4
5.7.4.5
116
Special Fully-Nested Mode
This mode will be used in the case of a system where cascading is used, and the priority has to be
conserved within each slave. In this case, the special fully-nested mode will be programmed to the
master controller. This mode is similar to the fully-nested mode with the following exceptions:
Automatic Rotation Mode (Equal Priority Devices)
In some applications, there are a number of interrupting devices of equal priority. Automatic
rotation mode provides for a sequential 8-way rotation. In this mode, a device receives the lowest
priority after being serviced. In the worst case, a device requesting an interrupt will have to wait
until each of seven other devices are serviced at most once.
There are two ways to accomplish automatic rotation using OCW2; the Rotation on Non-Specific
EOI Command (R=1, SL=0, EOI=1) and the rotate in automatic EOI mode, which is set by
(R=1, SL=0, EOI=0).
Specific Rotation Mode (Specific Priority)
Software can change interrupt priorities by programming the bottom priority. For example, if IRQ5
is programmed as the bottom priority device, then IRQ6 will be the highest priority device. The Set
Priority Command is issued in OCW2 to accomplish this, where: R=1, SL=1, and LO-L2 is the
binary priority level code of the bottom priority device.
In this mode, internal status is updated by software control during OCW2. However, it is
independent of the EOI command. Priority changes can be executed during an EOI command by
using the Rotate on Specific EOI Command in OCW2 (R=1, SL=1, EOI=1 and LO-L2=IRQ level
to receive bottom priority.
Poll Mode
Poll mode can be used to conserve space in the interrupt vector table. Multiple interrupts that can
be serviced by one interrupt service routine do not need separate vectors if the service routine uses
the poll command. Poll mode can also be used to expand the number of interrupts. The polling
interrupt service routine can call the appropriate service routine, instead of providing the interrupt
vectors in the vector table. In this mode the INTR output is not used and the microprocessor
internal Interrupt Enable flip-flop is reset, disabling its interrupt input. Service to devices is
achieved by software using a Poll command.
The Poll command is issued by setting P=1 in OCW3. The PIC treats its next I/O read as an
interrupt acknowledge, sets the appropriate ISR bit if there is a request, and reads the priority level.
Interrupts are frozen from the OCW3 write to the I/O read. The byte returned during the I/O read
will contain a 1 in bit 7 if there is an interrupt, and the binary code of the highest priority level in
bits 2:0.
When an interrupt request from a certain slave is in service, this slave is not locked out from
the master's priority logic and further interrupt requests from higher priority interrupts within
the slave will be recognized by the master and will initiate interrupts to the processor. In the
normal-nested mode, a slave is masked out when its request is in service.
When exiting the Interrupt Service routine, software has to check whether the interrupt
serviced was the only one from that slave. This is done by sending a Non-Specific EOI
command to the slave and then reading its ISR. If it is 0, a non-specific EOI can also be sent to
the master.
Intel
®
82801DBM ICH4-M Datasheet

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