FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 142

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
Functional Description
142
Table 5-35. State Transition Rules for Intel
Table 5-35
various states may appear to temporarily transition through intermediate states. For example, in
going from S0 to S1-M, it may appear to pass through the G0/S0/C2 states. These intermediate
transitions and states are not listed in the table.
NOTES:
1. Some wake events can be preserved through power failure.
2. Transitions from the S1-M–S5 or G3 states to the S0 state are deferred until BATLOW# is inactive.
G0/S0/C0
G0/S0/C1
G0/S0/C2
G0/S0/C3
G0/S0/C4
G1/S1-M,
G1/S3, or
Present
G1/S4
G2/S5
State
G3
shows the transitions rules among the various states. Note that transitions among the
• Processor halt instruction
• Level 2 Read
• Level 3 Read
• Level 4 Read
• SLP_EN bit set
• Power Button Override
• Mechanical Off/Power Failure
• Any Enabled Break Event
• STPCLK# goes active
• Power Button Override
• Power Failure
• Any Enabled Break Event
• STPCLK# goes inactive and previously
• Power Button Override
• Power Failure
• Any Enabled Break Event
• STPCLK# goes inactive and previously
• Power Button Override
• Power Failure
• Any Enabled Break Event
• STPCLK# goes inactive and previously
• Power Button Override
• Power Failure
• Any Enabled Wake Event
• Power Button Override
• Power Failure
• Any Enabled Wake Event
• Power Failure
• Power Returns
in C1
in C1
in C1
Transition Trigger
®
ICH4
• G0/S0/C1
• G0/S0/C2
• G0/S0/C3
• G0/S0/C3 or G0/S0/C4 (depending on
• G0/S0/C4
• G1/Sx or G2/S5state
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C2
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C1
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C1
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C1
• G2/S5
• G3
• G0/S0/C0 (See Note 2)
• G2/S5
• G3
• G0/S0/C0 (See Note 2)
• G3
• Optional to go to S0/C0 (reboot) or G2/S5
C4onC3_EN bit)
(stay off until power button pressed or other
wake event).
(See Note 1 and 2)
Intel
®
82801DBM ICH4-M Datasheet
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