FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 324

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
324
Bit
7
6
5
4
3
2
1
0
ADLIB_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 388h
MSS_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the MSS range to the LPC interface. This range is selected in the
MIDI_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the MIDI range to the LPC interface. This range is selected in the
SB16_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the SB16 range to the LPC interface. This range is selected in the
FDD_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the FDD range to the LPC interface. This range is selected in the
LPT_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the LPTrange to the LPC interface. This range is selected in the
COMB_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the COMB range to the LPC interface. This range is selected in the
COMA_LPC_EN — R/W.
0 = Disable.
1 = Enables the decoding of the COMA range to the LPC interface. This range is selected in the
LPC_Sound Decode Range Register.
LPC_Sound Decode Range Register.
LPC_Sound Decode Range Register.
LPC_FDD/LPT Decode Range Register.
LPC_FDD/LPT Decode Range Register.
LPC_COM Decode Range Register.
LPC_COM Decode Range Register.
Description
–
38Bh to the LPC interface.
Intel
®
82801DBM ICH4-M Datasheet