FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 489

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

14
14.1
Intel
®
Table 14-1. AC ‘97 Audio PCI Configuration Register Address Map (Audio—D31:F5)
82801DBM ICH4-M Datasheet
Note: Registers address locations not shown in
Note: Internal reset as a result of D3
AC ’97 Audio PCI Configuration Space (D31:F5)
NOTE: Refer to the ICH4 Specification Update for the value of the Revision ID Register.
following BIOS programmed registers as BIOS may not be invoked following the D3-to-D0
transition. All resume well registers will not be reset by the D3
AC ’97 Audio Controller Registers
(D31:F5)
2C–2Dh
18–1Bh
1C–1Fh
2E–2Fh
00–01h
02–03h
04–05h
06–07h
10–13h
14–17h
50–51h
52–53h
54–55h
Offset
0Ah
0Bh
0Eh
3Ch
3Dh
08h
09h
34h
40h
41h
Mnemonic
NAMBBAR
NAMBBAR
CAP_PTR
INTR_PN
INTR_LN
PCICMD
PCISTS
MMBAR
MBBAR
HEDT
SVID
PCID
SCC
BCC
CFG
PCS
VID
DID
RID
SID
PID
PC
PI
Vendor Identification
Device Identification
PCI Command
PCI Device Status
Revision Identification
Programming Interface
Sub Class Code
Base Class Code
Header Type
Native Audio Mixer Base Address
Native Audio Bus Mastering Base Address
Mixer Base Address(Mem)
Bus Master Base Address(Mem)
Subsystem Vendor ID
Subsystem ID
Capabilities Pointer
Interrupt Line
Interrupt Pin
Programmable Codec ID
Configuration
PCI Power Management ID
PC -Power Management Capabilities
Power Management Control and Status
HOT
to D0 transition will reset all the core well registers except the
Table 14-1
Register
AC ’97 Audio Controller Registers (D31:F5)
should be treated as Reserved.
HOT
to D0 transition.
00000001h
00000001h
00000000h
00000000h
See Note
Default
C9C2h
24C5h
8086h
0280h
0000h
0000h
0001h
0000h
0000
01h
04h
50h
00h
02h
01h
00h
00
00
R/W, R/WC
R/WC, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
Access
R/WO
R/WO
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
489