FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 521

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

15.1.15
15.1.16
15.1.17
Intel
®
82801DBM ICH4-M Datasheet
INTR_LN—Interrupt Line Register (Modem—D31:F6)
Address Offset:
Default Value:
Lockable:
This register indicates which PCI interrupt line is used for the AC ’97 module interrupt.
INT_PIN—Interrupt Pin (Modem—D31:F6)
Address Offset:
Default Value:
Lockable:
This register indicates which PCI interrupt pin is used for the AC ’97 modem interrupt. The AC ’97
interrupt is internally OR’d to the interrupt controller with the PIRQB# signal.
PID—PCI Power Management Capability ID Register
(Modem—D31:F6)
Address Offset:
Default Value:
Lockable:
15:8
7:0
7:0
Bit
Bit
7:3
2:0
Bit
Interrupt Line (INT_LN) — R/W. This data is not used by the ICH4. It is used to communicate to
software the interrupt line that the interrupt pin is connected to.
Next Capability (NEXT) — RO. This field indicates that this is the last item in the list.
Capability ID (CAP) — RO. This field indicates that this pointer is a message signaled interrupt
capability.
Reserved
Interrupt Pin (INT_PN) — RO. Hardwired to 010b to select PIRQB#.
3Ch
00h
No
3Dh
02h
No
50h
0001h
No
Description
Description
Description
AC ’97 Modem Controller Registers (D31:F6)
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
R/W
8 bits
Core
RO
8 bits
Core
RO
16 bits
Core
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