FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 368

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
LPC Interface Bridge Registers (D31:F0)
9.8.2
9.8.2.1
9.8.2.2
368
Table 9-9. APM Register Map
APM I/O Decode
Table 9-9
the PCI Device 31: Function 0 space (APMDEC_EN), and cannot be moved (fixed I/O location).
APM_CNT—Advanced Power Management Control Port Register
I/O Address:
Default Value:
Lockable:
Power Well:
APM_STS—Advanced Power Management Status Port Register
I/O Address:
Default Value:
Lockable:
Power Well:
Address
7:0
7:0
Bit
Bit
B2h
B3h
Used to pass data between the OS and the SMI handler. Basically, this is a scratchpad register and
is not affected by any other register or function (other than a PCI reset).
shows the I/O registers associated with APM support. This register space is enabled in
Used to pass an APM command between the OS and the SMI handler. Writes to this port not only
store data in the APMC register, but also generates an SMI# when the APMC_EN bit is set.
Mnemonic
APM_CNT
APM_STS
No
Core
No
Core
B2h
00h
00h
B3h
Advanced Power Management Control Port
Advanced Power Management Status Port
Register Name
Description
Description
Attribute:
Size:
Usage:
Attribute:
Size:
Usage:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bit
Legacy Only
R/W
8 bit
Legacy Only
Default
00h
00h
Type
R/W
R/W

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