FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 402

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

IDE Controller Registers (D31:F1)
10.1.1
10.1.2
10.1.3
402
VID—Vendor ID Register (LPC I/F—D31:F1)
Offset Address:
Default Value:
Lockable:
DID—Device ID Register (LPC I/F—D31:F1)
Offset Address:
Default Value:
Lockable:
CMD — Command Register (IDE—D31:F1)
Address Offset:
Default Value:
15:10
15:0
15:0
Bit
Bit
Bit
9
8
7
6
5
4
3
2
1
Vendor Identification Value — RO . This is a 16-bit value assigned to Intel. Intel VID = 8086h
Device Identification Value — RO . This is a 16-bit value assigned to the ICH4 IDE Controller.
Reserved
Fast Back to Back Enable (FBE) — RO. Reserved as 0.
SERR# Enable (SERR_EN) — RO. Reserved as 0.
Wait Cycle Control (WCC) — RO. Reserved as 0.
Parity Error Response (PER) — RO. Reserved as 0.
VGA Palette Snoop (VPS) — RO. Reserved as 0.
Postable Memory Write Enable (PMWE) — RO. Reserved as 0.
Special Cycle Enable (SCE) — RO. Reserved as 0.
Bus Master Enable (BME) — R/W. Controls the ICH4’s ability to act as a PCI master for IDE Bus
Master transfers.
0 = Disable
1 = Enable
Memory Space Enable (MSE) — R/W.
0 = Disables access.
1 = Enables access to the IDE Expansion memory range. The EXBAR register (Offset 24h) must
NOTE: BIOS should set this bit to a 1.
be programmed before this bit is set.
00
02
04h
8086h
No
24CAh
No
00h
–
–
01h
03h
–
05h
Description
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attribute:
Size:
Intel
R/W, RO
16 bits
®
82801DBM ICH4-M Datasheet
RO
16 bit
Core
RO
16 bit
Core