FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 322

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.1.29
322
FWH_DEC_EN1—FWH Decode Enable 1 Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
This register determines which memory ranges will be decoded on the PCI bus and forwarded to
the FWH. The ICH4 will subtractively decode cycles on PCI unless POS_DEC_EN is set to 1.
Bit
7
6
5
4
3
2
1
0
FWH_F8_EN — R/W. Enables decoding two 512 KB FWH memory ranges, and one 128KB
memory range.
0 = Disable
1 = Enable the following ranges for the FWH
FWH_F0_EN — R/W. Enables decoding two 512 KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH:
FWH_E8_EN — R/W. Enables decoding two 512 KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH:
FWH_E0_EN — R/W. Enables decoding two 512 KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH:
FWH_D8_EN — R/W. Enables decoding two 512 KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH
FWH_D0_EN — R/W. Enables decoding two 512KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH
FWH_C8_EN — R/W. Enables decoding two 512KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH
FWH_C0_EN — R/W. Enables decoding two 512 KB FWH memory ranges.
0 = Disable.
1 = Enable the following ranges for the FWH
FFF80000h
FFB80000h
000E0000h
FFF00000h
FFB00000h
FFE80000h
FFA80000h
FFE00000h
FFA00000h
FFD80000h
FF980000h
FFD00000h
FF900000h
FFC80000h
FF880000h
FFC00000h
FF800000h
FFh
E3h
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
FFFFFFFFh
000FFFFFh
FFF7FFFFh
FFAFFFFFh
FFA7FFFFh
FF9FFFFFh
FF97FFFFh
FF8FFFFFh
FF87FFFFh
FFBFFFFFh
FFB7FFFFh
FFEFFFFh
FFE7FFFFh
FFDFFFFFh
FFD7FFFFh
FFCFFFFFh
FFC7FFFFh
Description
Attribute:
Size:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bits