FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 509

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

14.2.8
Intel
®
82801DBM ICH4-M Datasheet
GLOB_CNT—Global Control Register
I/O Address:
Default Value:
Lockable:
Reads across DWord boundaries are not supported.
31:30
29:24
23:22
21:20
19:7
Bit
6
5
4
3
S/PDIF Slot Map (SSM) — R/W. If the run/pause bus master bit (bit 0 of offset 2Bh) is set, then the
value in these bits indicate which slots S/PDIF data is transmitted on. Software must ensure that
the programming here does not conflict with the PCM channels being used. If there is a conflict,
unpredictable behavior will result - the hardware will not check for a conflict.
00 = Reserved
01 = Slots 7 and 8
10 = Slots 6 and 9
11 = Slots 10 and 11
Reserved.
PCM Out Mode (POM) — R/W. This field enables the PCM out channel to use 16 or 20-bit audio
on PCM out. This does not affect the microphone of S/PDIF DMA. When greater than 16 bit audio
is used, the data structures are aligned as 32-bits per sample, with the highest order bits
representing the data, and the lower order bits as don’t care.
00 = 16 bit audio (default)
01 = 20 bit audio
10 = Reserved. If set, indeterminate behavior will result.
11 = Reserved. If set, indeterminate behavior will result.
PCM 4/6 Enable — R/W. This field configures PCM Output for 2, 4 or 6 channel mode.
00 = 2-channel mode (default)
01 = 4-channel mode
10 = 6-channel mode
11 = Reserved
Reserved.
AC_SDIN2 Interrupt Enable (S2RE) — R/W.
0 = Disable.
1 = Enable an interrupt to occur when the codec on AC_SDIN[2] causes a resume event on the
AC_SDIN1 Resume Interrupt Enable (S1RE) — R/W.
0 = Disable.
1 = Enable an interrupt to occur when the codec on AC_SDIN[1] causes a resume event on the
AC_SDIN0 Resume Interrupt Enable (S0RE) — R/W.
0 = Disable.
1 = Enable an interrupt to occur when the codec on AC_SDIN[0] causes a resume event on the
ACLINK Shut Off (LSO) — R/W.
0 = Normal operation.
1 = Controller disables all outputs which will be pulled low by internal pull down resistors.
AC-link.
AC-link.
AC-link.
NABMBAR + 2Ch
00000000h
No
Description
AC ’97 Audio Controller Registers (D31:F5)
Attribute:
Size:
Power Well:
R/W
32 bits
Core
509