FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 240

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Functional Description
240
Table 5-96. Read Cycle Format
Table 5-97. Data Values for Slave Read Registers (Sheet 1 of 2)
Register
21–27
30–37
11–18
2–8
Bit
10
19
20
28
29
38
39
1
9
0
1
1
2
2
3
3
4
4
4
Start
Slave Address – 7 bits
Write
ACK
Command code – 8 bits
ACK
Repeated Start
Slave Address - 7 bits
Read
ACK
Data Byte
NOT ACK
Stop
Bits
7:0
2:0
7:3
3:0
7:4
5:0
7:6
0
1
2
Description
Reserved.
System Power State
Reserved
Frequency Strap Register
Reserved
Watchdog Timer current value
Reserved
1 = The Intruder Detect (INTRD_DET) bit is set. This indicates that the system cover has
1 = BTI Temperature Event occurred. This bit will be set if the ICH4’s THRM# input signal is
Boot-Status. This bit will be 1 when the processor does not fetch the first instruction.
• 000 = S0
• 001 = S1-M
• 010 = Reserved
• 011 = S3
• 100 = S4
• 101 = S5
• 110 = Reserved
• 111 = Reserved
probably been opened.
active. Need to take after polarity control.
External Microcontroller
External Microcontroller
External Microcontroller Always 0
ICH4
External Microcontroller
ICH4
External Microcontroller
External Microcontroller
External Microcontroller Always 1
ICH4
ICH4
External Microcontroller
External Microcontroller
Driven by:
Description
Must match value in Receive Slave Address
register
Indicates which register is being accessed.
See
Must match value in Receive Slave Address
register
Value depends on register being accessed.
See
Table
Table
Intel
®
5-97.
5-97.
82801DBM ICH4-M Datasheet
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