FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 348

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.5.2
.
9.5.3
9.5.4
348
Note: Writes to this register are only allowed by the processor and by masters on the ICH4’s PCI bus.
IND—Index Register
Memory Address
Default Value:
The Index Register will select which APIC indirect register to be manipulated by software. The
selector values for the indirect registers are listed in
to select the desired APIC internal register
DAT—Data Register
Memory Address
Default Value:
This is a 32-bit register specifying the data to be read or written to the register pointed to by the
Index register. This register can only be accessed in DWORD quantities.
IRQPA—IRQ Pin Assertion Register
Memory Address
Default Value:
The IRQ Pin Assertion Register is present to provide a mechanism to scale the number of interrupt
inputs into the I/O APIC without increasing the number of dedicated input pins. When a device that
supports this interrupt assertion protocol requires interrupt service, that device will issue a write to
this register. Bits 4:0 written to this register contain the IRQ number for this interrupt. The only
valid values are 0
always write a value of 0 for Bits 31:5.
See
Writes by devices on PCI buses above the ICH4 (e.g., a PCI segment on a P64H) are not supported.
7:0
7:0
Bit
Bit
31:5
4:0
Section 5.8.4
Bit
APIC Index — R/W. This is an 8-bit pointer into the I/O APIC register table.
APIC Data — R/W. This is a 32-bit register for the data to be read or written to the APIC indirect
register pointed to by the Index register.
Reserved. To provide for future expansion, the CPU should always write a value of 0 to Bits 31:5.
IRQ Number — WO. Bits 4:0 written to this register contain the IRQ number for this interrupt. The
only valid values are 0
–
for more details on how PCI devices will use this field.
23. Bits 31:5 are ignored. To provide for future expansion, peripherals should
FEC0_0000h
FEC0_0010h
00000000h
FEC0_0020h
N/A
00h
–
23.
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Table
9-5. Software will program this register
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bits
R/W
32 bits
WO
32 bits