FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 290

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
Hub Interface to PCI Bridge Registers (D30:F0)
8.1.1
8.1.2
290
Table 8-1. Hub Interface PCI Configuration Register Address Map (HUB-PCI—D30:F0) (Sheet 2
of 2)
NOTE: Refer to the ICH4 Specification Update for the value of the Revision ID Register.
VID—Vendor ID Register (HUB-PCI—D30:F0)
Offset Address:
Default Value:
DID—Device ID Register (HUB-PCI—D30:F0)
Offset Address:
Default Value:
3E–3Fh
40–43h
44–45h
50–51h
Offset
15:0
15:0
Bit
Bit
3Ch
70h
82h
90h
92h
Vendor Identification Value —RO. This is a 16-bit value assigned to Intel. Intel VID = 8086h.
Device Identification Value — RO. This is a 16-bit value assigned to the ICH4 hub interface to PCI
bridge (i.e., Device #2).
DID = 2448h.
PCI_MAST_STS
DEVICE_HIDE
BRIDGE_CNT
Mnemonic
ERR_CMD
ERR_STS
INT_LINE
HI1_CMD
CNF
MTT
00
8086h
02
2448h
01h
03h
Interrupt Line
Bridge Control
Hub Interface 1 Command Control
Secondary PCI Device Hiding Register
ICH4 Configuration Register
Multi-Transaction Timer
PCI Master Status
Error Command Register
Error Status Register
Register Name
Description
Description
Attribute:
Size:
Attribute:
Size:
Intel
®
82801DBM ICH4-M Datasheet
RO
16 bits
RO
16 bits
00202802h
Default
0000h
1400h
00h
20h
00h
00h
00h
00
R/W, R/WC,
R/W, RO
R/WC
Type
R/W
R/W
R/W
R/W
R/W
RO
RO

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