FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 284

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LAN Controller Registers (B1:D8:F0)
7.2.9
284
Flow Control Register
Offset Address:
Default Value:
15:13
7:3
2:0
Bit
12
10
11
9
8
Reserved
FC Paused Low — RO.
0 = Cleared when the FC timer reaches zero, or a Pause frame is received.
1 = Set when the LAN Controller receives a Pause Low command with a value greater than zero.
FC Paused — RO.
0 = Cleared when the FC timer reaches zero.
1 = Set when the LAN Controller receives a Pause command regardless of its cause (FIFO
FC Full — RO.
0 = Cleared when the FC timer reaches zero.
1 = Set when the LAN Controller sends a Pause command with a value greater than zero.
Xoff — R/W (special). This bit should only be used if the LAN Controller is configured to operate
with IEEE frame-based flow control.
0 = This bit can only be cleared by writing a 1 to the Xon bit (bit 8 in this register).
1 = Writing a 1 to this bit forces the Xoff request to 1 and causes the LAN Controller to behave as if
Xon — WO. This bit should only be used if the LAN Controller is configured to operate with IEEE
frame-based flow control.
0 = This bit always returns 0 on reads.
1 = Writing a 1 to this bit resets the Xoff request to the LAN Controller, clearing bit 9 in this register.
Reserved
Flow Control Threshold — R/W. The LAN Controller can generate a Flow Control Pause frame
when its Receive FIFO is almost full. The value programmed into this field determines the number of
bytes still available in the Receive FIFO when the Pause frame is generated.
Bits 2:0in Receive FIFOComment
0000.50 kBFast system (recommended default)
0011.00 kB
0101.25 kB
0111.50 kB
1001.75 kB
1012.00 kB
1102.25 kB
1112.50 kBSlow system
Free Bytes
reaching Flow Control Threshold, fetching a Receive Frame Descriptor with its Flow Control
Pause bit set, or software writing a 1 to the Xoff bit).
the FIFO extender is full. This bit will also be set to 1 when an Xoff request due to an “RFD
Xoff” bit.
19
h
–
1Ah
Description
Attribute:
Size:
Intel
®
82801DBM ICH4-M Datasheet
RO, R/W (special)
16 bits