FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 374

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.8.3.4
9.8.3.5
374
PM1_TMR—Power Management 1 Timer Register
I/O Address:
Default Value:
Lockable:
Power Well:
PROC_CNT—Processor Control Register
I/O Address:
Default Value:
Lockable:
Power Well:
31:24
31:18
23:0
16:9
7:5
Bit
Bit
17
8
Reserved
Timer Value (TMR_VAL) — RO. Returns the running count of the PM timer. This counter runs off a
3.579545 MHz clock (14.31818 MHz divided by 4). It is reset to zero during a PCI reset, and then
continues counting as long as the system is in the S0 state.
Anytime bit 22 of the timer goes HIGH to LOW (bits referenced from 0 to 23), the TMROF_STS bit is
set. The high-to-low transition will occur every 2.3435 seconds. If the TMROF_EN bit is set, an SCI
interrupt is also generated.
Reserved
Throttle Status (THTL_STS) — RO.
0 = No clock throttling is occurring (maximum processor performance).
1 = Indicates that the clock state machine is in some type of low power state (where the processor
Reserved
Force Thermal Throttling (FORCE_THTL) — R/W. Software can set this bit to force the thermal
throttling function. This has the same effect as the THRM# signal being active for 2 seconds.
0 = No forced throttling.
1 = Throttling at the duty cycle specified in THRM_DTY starts immediately (no 2 second delay), and
THRM_DTY — R/W . This write-once 3-bit field determines the duty cycle of the throttling when the
thermal override condition occurs. The duty cycle indicates the approximate percentage of time the
STPCLK# signal is asserted while in the throttle mode. The STPCLK# throttle period is 1024
PCICLKs. Note that the throttling only occurs if the system is in the C0 state. If in the C2 state, no
throttling occurs.
There is no enable bit for thermal throttling, because it should not be disabled. Once the
THRM_DTY field is written, any subsequent writes will have no effect until PCIRST# goes active.
THRM_DTY Throttle ModePCI Clocks
000 50% (Default)512
001 87.5%896
010 75.0%768
011 62.5%640
100 50%512
101 37.5%384
110 25%256
111 12.5%128
is not running at its maximum performance): thermal throttling or hardware throttling.
no SMI# is generated.
No
Core
00000000h
No (bits 7:5 are write once)
Core
PMBASE + 08h
(
xx000000h
PMBASE + 10h
(
ACPI PMTMR_BLK)
ACPI P_BLK)
Description
Description
Attribute:
Size:
Usage:
Attribute:
Size:
Usage:
Intel
®
82801DBM ICH4-M Datasheet
RO
32-bit
ACPI
R/W, RO
32 bit
ACPI or Legacy