FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 303

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

8.1.29
8.1.30
Intel
®
82801DBM ICH4-M Datasheet
PCI_MAST_STS—PCI Master Status Register
(HUB-PCI—D30:F0)
Offset Address:
Default Value:
ERR_CMD—Error Command Register (HUB-PCI—D30:F0)
Offset Address:
Default Value:
Lockable:
This register configures the ICH4’s Device 30 responses to various system errors. The actual
assertion of the internal SERR# (routed to cause NMI# or SMI#) is enabled via the PCI Command
register.
Bit
7:3
2:0
5:0
7:3
1:0
Bit
Bit
7
6
2
Multi-Transaction Timer Count Value — R/W. This field specifies the amount of time that grant
will remain asserted to a master continuously asserting its request for multiple transfers. This field
specifies the count in an 8-clock (PCI clock) granularity.
Reserved
Internal PCI Master Request Status (INT_MREQ_STS) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = The ICH4’s internal DMA controller or LPC has requested use of the PCI bus.
Internal LAN Master Request Status (LAN_MREQ_STS) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = The ICH4’s internal LAN controller has requested use of the PCI bus.
PCI Master Request Status (PCI_MREQ_STS) — R/WC. Allows software to see if a particular bus
master has requested use of the PCI bus. For example, bit 0 will be set if ICH4 has detected
REQ[0]# asserted and bit 5 will be set if ICH4 detected REQ[5]# asserted.
0 = Software clears these bits by writing a 1 to the bit position.
1 = The associated PCI master has requested use of the PCI bus.
Reserved
SERR# Enable on Receiving Target Abort (SERR_RTA_EN) — R/W.
0 = Disable.
1 = Enable. When SERR_EN is set, the ICH4 will report SERR# when SERR_RTA is set.
Reserved
82h
00h
90h
00h
No
Hub Interface to PCI Bridge Registers (D30:F0)
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Power Well:
R/WC
8 bits
R/W
8 bit
Core
303