FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 528

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

AC ’97 Modem Controller Registers (D31:F6)
15.2.7
528
x_CR—Control Register
I/O Address:
Default Value:
Lockable:
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 8-bit read
to offset 0Bh. Reads across DWord boundaries are not supported.
Bit
7:5
4
3
2
1
0
Reserved
Interrupt On Completion Enable (IOCE) — R/W. This bit controls whether or not an interrupt
occurs when a buffer completes with the IOC bit set in its descriptor.
0 = Disable
1 = Enable
FIFO Error Interrupt Enable (FEIE) — R/W. This bit controls whether the occurrence of a FIFO
error will cause an interrupt or not.
0 = Disable. Bit 4 in the Status Register will be set, but the interrupt will not occur.
1 = Enable. Interrupt will occur
Last Valid Buffer Interrupt Enable (LVBIE) — R/W. This bit controls whether the completion of the
last valid buffer will cause an interrupt or not.
0 = Disable. Bit 2 in the Status register will still be set, but the interrupt will not occur.
1 = Enable
Reset Registers (RR) — R/W-Special.
0 = Removes reset condition.
1 = Contents of all registers to be reset, except the interrupt enable bits (bit 4,3,2 of this register).
Run/Pause Bus Master (RPBM) — R/W.
0 = Pause bus master operation. This results in all state information being retained (i.e., master
1 = Run. Bus master operation starts.
Software needs to set this bit. It must be set only when the Run/Pause bit is cleared. Setting it
when the Run bit is set will cause undefined consequences. This bit is self-clearing (software
needs not clear it).
mode operation can be stopped and then resumed).
MBAR + 0Bh (MICR),
MBAR + 1Bh (MOCR)
00h
No
Description
Attribute:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bits
Core