FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 26

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Tables
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2-5
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4-1
5-1
5-2
5-3
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5-19
5-20
Industry Specifications ................................................................................... 33
PCI Devices and Functions ........................................................................... 36
Hub Interface Signals .................................................................................... 45
LAN Connect Interface Signals...................................................................... 45
EEPROM Interface Signals ........................................................................... 46
Firmware Hub Interface Signals .................................................................... 46
PCI Interface Signals ..................................................................................... 46
IDE Interface Signals ..................................................................................... 49
LPC Interface Signals .................................................................................... 50
Interrupt Signals............................................................................................. 50
USB Interface Signals.................................................................................... 51
Power Management Interface Signals........................................................... 52
Processor Interface Signals........................................................................... 54
SM Bus Interface Signals .............................................................................. 55
System Management Interface Signals ......................................................... 55
Real Time Clock Interface ............................................................................. 56
Other Clocks .................................................................................................. 56
Miscellaneous Signals ................................................................................... 56
AC’97 Link Signals......................................................................................... 57
General Purpose I/O Signals ......................................................................... 58
Power and Ground Signals............................................................................ 59
Functional Strap Definitions........................................................................... 60
Test Mode Selection ...................................................................................... 62
Intel
Integrated Pull-Up and Pull-Down Resistors ................................................. 64
IDE Series Termination Resistors.................................................................. 64
Power Plane and States for Output and I/O Signals...................................... 66
Power Plane for Input Signals ....................................................................... 69
Intel
Type 0 Configuration Cycle Device Number Translation ............................... 77
LPC Cycle Types Supported ......................................................................... 93
Start Field Bit Definitions ............................................................................... 93
Cycle Type Bit Definitions .............................................................................. 94
Transfer Size Bit Definition ............................................................................ 94
SYNC Bit Definition........................................................................................ 94
Intel
DMA Transfer Size ...................................................................................... 100
Address Shifting in 16-bit I/O DMA Transfers .............................................. 100
DMA Cycle vs. I/O Address ......................................................................... 104
PCI Data Bus vs. DMA I/O Port Size ........................................................... 104
DMA I/O Cycle Width vs. BE[3:0]# .............................................................. 104
Counter Operating Modes ........................................................................... 110
Interrupt Controller Core Connections ......................................................... 112
Interrupt Status Registers ............................................................................ 113
Content of Interrupt Vector Byte .................................................................. 113
APIC Interrupt Mapping ............................................................................... 119
Arbitration Cycles......................................................................................... 121
APIC Message Formats............................................................................... 121
EOI Message ............................................................................................... 122
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ICH4 System Power Planes................................................................. 63
ICH4-M and System Clock Domains ................................................... 71
ICH4 Response to Sync Failures......................................................... 95
Intel
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82801DBM ICH4-M Datasheet