FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 221

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
Intel
®
Table 5-77. Debug Port Behavior
82801DBM ICH4-M Datasheet
Table 5-77
as bits in the associated Port Status and Control register.
5.17.10.1.1OUT Transactions
An Out transaction sends data to the debug device. It can occur only when the following are true:
The sequence of the transaction is:
1. Software sets the appropriate values in the following bits:
OWNER_CNT
The debug port is enabled
The debug software sets the GO_CNT bit
The WRITE_READ#_CNT bit is set
— USB_ADDRESS_CNF
— USB_ENDPOINT_CNF
— DATA_BUFFER[63:0]
— TOKEN_PID_CNT[7:0]
— SEND_PID_CNT[15:8]
— DATA_LEN_CNT
— WRITE_READ#_CNT (note: this will always be 1 for OUT transactions)
— GO_CNT (note: this will always be 1 to initiate the transaction)
0
1
1
1
1
1
1
1
shows the debug port behavior related to the state of bits in the debug registers as well
ENABLED_CT
X
0
1
1
1
1
1
1
Enable
Port
X
X
0
0
1
1
1
1
Run /
Stop
X
X
0
1
0
0
1
1
Suspend
X
X
X
X
0
1
0
1
Debug port is not being used.
Normal operation.
Debug port is not being used.
Normal operation.
Debug port in Mode 1. SYNC
keepalives sent plus debug traffic
Debug port in Mode 2. SOF (and
only SOF) is sent as keepalive.
Debug traffic is also sent. Note that
no other normal traffic is sent out
this port, because the port is not
enabled.
Illegal. Host controller driver should
never put controller into this state
(enabled, not running and not
suspended).
Port is suspended. No debug traffic
sent.
Debug port in Mode 2. Debug
traffic is interspersed with normal
traffic.
Port is suspended. No debug traffic
sent.
Debug Port Behavior
Functional Description
221

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