FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 356

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.6.2.2
356
RTC_REGB—Register B (General Configuration)
RTC Index:
Default Value:
Lockable:
Bit
7
6
5
4
3
2
1
0
Update Cycle Inhibit (SET) — R/W. Enables/Inhibits the update cycles. This bit is not affected by
RSMRST# nor any other reset signal.
0 = Update cycle occurs normally once each second.
1 = A current update cycle will abort and subsequent update cycles will not occur until SET is
NOTE: This bit should be set then cleared by BIOS early in BIOS POST, after each power-up directly
Periodic Interrupt Enable (PIE) — R/W. This bit is cleared by RSMRST#, but not on any other reset.
0 = Disable.
1 = Allows an interrupt to occur with a time base set with the RS bits of register A.
Alarm Interrupt Enable (AIE) — R/W. This bit is cleared by RSMRST#, but not on any other reset.
0 = Disable.
1 = Allows an interrupt to occur when the AF is set by an alarm match from the update cycle. An
Update-Ended Interrupt Enable (UIE) — R/W. This bit is cleared by RSMRST#, but not on any other
reset.
0 = Disable.
1 = Allows an interrupt to occur when the update cycle ends.
Square Wave Enable (SQWE) — R/W. This bit serves no function in the ICH4. It is left in this register
bank to provide compatibility with the Motorola* 146818B. The ICH4 has no SQW pin. This bit is
cleared by RSMRST#, but not on any other reset.
Data Mode (DM) — R/W. Specifies either binary or BCD data representation. This bit is not affected
by RSMRST# nor any other reset signal.
0 = BCD
1 = Binary
Hour Format (HOURFORM) — R/W. Indicates the hour byte format. This bit is not affected by
RSMRST# nor any other reset signal.
0 = Twelve-hour mode. In twelve-hour mode, the seventh bit represents AM as zero and PM as one.
1 = Twenty-four hour mode.
Daylight Savings Enable (DSE) — R/W. Triggers two special hour updates per year. The days for
the hour adjustment are those specified in United States federal law as of 1987, which is different
than previous years. This bit is not affected by RSMRST# nor any other reset signal.
0 = Daylight Savings Time updates do not occur.
1 = a) Update on the first Sunday in April, where time increments from 1:59:59 AM to 3:00:00 AM.
returned to zero. When set is one, the BIOS may initialize time and calendar bytes safely.
alarm can occur once a second, one an hour, once a day, or one a month.
b) Update on the last Sunday in October when the time first reaches 1:59:59 AM, it is changed to
1:00:00 AM. The time must increment normally for at least two update cycles (seconds) previous
to these conditions for the time change to occur properly.
after coin-cell batter insertion.
0Bh
U0U00UUU (U: Undefined)
No
Description
Attribute:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bit
RTC