FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 389

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

9.9
9.9.1
Intel
®
Table 9-11. TCO I/O Register Map
82801DBM ICH4-M Datasheet
System Management TCO Registers (D31:F0)
The TCO logic is accessed via registers mapped to the PCI configuration space
(Device 31:Function 0) and the system I/O space. For TCO PCI Configuration registers, see LPC
Device 31:Function 0 PCI Configuration registers.
The TCO I/O registers reside in a 32-byte range pointed to by a TCOBASE value, which is,
ACPIBASE + 60h in the PCI configuration space.
within that 32-byte range. Each register is described in the following sections.
TCO_RLD—TCO Timer Reload and Current Value Register
I/O Address:
Default Value:
Lockable:
0Ch
0Ah
04h
06h
08h
11h
Bit
7:0
Offset
00h
01h
02h
03h
0Eh
0Fh
10h
–
–
–
–
–
–
1Fh
05h
07h
09h
0Bh
0Dh
Reading this register will return the current count of the TCO timer. Writing any value to this register
will reload the timer to prevent the timeout. Bits 7:6 will always be 0.
TCO_MESSAGE1
TCO_MESSAGE2
TCO_WDSTATUS
TCO_DAT_OUT
SW_IRQ_GEN
TCO_DAT_IN
TCO1_CNT
TCO2_CNT
TCO1_STS
TCO2_STS
Mnemonic
TCO_TMR
TCO_RLD
TCOBASE +00h
00h
No
—
—
TCO Timer Reload and Current Value
TCO Timer Initial Value
TCO Data In
TCO Data Out
TCO Status
TCO Status
TCO Control
TCO Control
Used by BIOS to indicate POST/Boot progress
Watchdog Status Register
Reserved
Software IRQ Generation Register
Reserved
Description
Register Name
Table 9-11
Attribute:
Size:
Power Well:
LPC Interface Bridge Registers (D31:F0)
shows the mapping of the registers
R/W
8 bit
Core
R/W-Special
R/W, R/WC,
R/W, RO
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
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