FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 390

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.9.2
9.9.3
9.9.4
390
TCO_TMR—TCO Timer Initial Value Register
I/O Address:
Default Value:
Lockable:
TCO_DAT_IN—TCO Data In Register
I/O Address:
Default Value:
Lockable:
TCO_DAT_OUT—TCO Data Out Register
I/O Address:
Default Value:
Lockable:
7:6
5:0
7:0
7:0
Bit
Bit
Bit
Reserved
Value that is loaded into the timer each time the TCO_RLD register is written. Values of 0h
be ignored and should not be attempted. The timer is clocked at approximately 0.6 seconds, and
this allows timeouts ranging from 2.4 seconds to 38 seconds.
Data Register for passing commands from the OS to the SMI handler. Writes to this register will
cause an SMI and set the SW_TCO_SMI bit in the TCO1_STS register.
Data Register for passing commands from the SMI handler to the OS. Writes to this register will set
the TCO_INT_STS bit in the TCO_STS register. It will also cause an interrupt, as selected by the
TCO_INT_SEL bits.
TCOBASE +01h
04h
No
TCOBASE +02h
00h
No
TCOBASE +03h
00h
No
Description
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bit
Core
R/W
8 bit
Core
R/W
8 bit
Core
–1
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